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Commit e4887b09 authored by Philip Müller's avatar Philip Müller
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[pkg-upd] 2022.01-02

- add mising patches
parent 8688c350
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From 679d7562f4711b1ad8c5ea54aa804fde5da5a19d Mon Sep 17 00:00:00 2001
From: Samuel Dionne-Riel <samuel@dionne-riel.com>
Date: Sat, 5 Feb 2022 21:00:53 -0500
Subject: [PATCH] mtd: spi-nor-ids: Add GigaDevice GD25LQ128E entry
---
drivers/mtd/spi/spi-nor-ids.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 4aef1ddd6e2..ff5bc2b2d78 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -112,6 +112,11 @@ const struct flash_info spi_nor_ids[] = {
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
},
+ {
+ INFO("gd25lq128e", 0x257018, 0, 64 * 1024, 256,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+ },
{
INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
--
2.34.0
From: Peter Geis <pgwipeout@gmail.com>
To: Peng Fan <peng.fan@nxp.com>, Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peter Geis <pgwipeout@gmail.com>, u-boot@lists.denx.de
Subject: [PATCH v1 02/11] mmc: sdhci: allow disabling sdma in spl
Date: Mon, 21 Feb 2022 20:31:21 -0500
Rockchip emmc devices have a similar issue to Rockchip dwmmc devices,
where performing dma to sram causes errors with suspend/resume.
Allow us to toggle sdma in spl for sdhci similar to adma support, so we
can ensure dma is not used when loading the sram code.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
---
drivers/mmc/Kconfig | 7 +++++++
drivers/mmc/sdhci.c | 6 +++---
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index f04cc44e1973..1e4342285ce7 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -468,6 +468,13 @@ config MMC_SDHCI_SDMA
This enables support for the SDMA (Single Operation DMA) defined
in the SD Host Controller Standard Specification Version 1.00 .
+config SPL_MMC_SDHCI_SDMA
+ bool "Support SDHCI SDMA in SPL"
+ depends on MMC_SDHCI
+ help
+ This enables support for the SDMA (Single Operation DMA) defined
+ in the SD Host Controller Standard Specification Version 1.00 in SPL.
+
config MMC_SDHCI_ADMA
bool "Support SDHCI ADMA2"
depends on MMC_SDHCI
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 766e4a6b0c5e..6285e53d12a2 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -70,7 +70,7 @@ static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data)
}
}
-#if (defined(CONFIG_MMC_SDHCI_SDMA) || CONFIG_IS_ENABLED(MMC_SDHCI_ADMA))
+#if (CONFIG_IS_ENABLED(MMC_SDHCI_SDMA) || CONFIG_IS_ENABLED(MMC_SDHCI_ADMA))
static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data,
int *is_aligned, int trans_bytes)
{
@@ -177,7 +177,7 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data)
}
} while (!(stat & SDHCI_INT_DATA_END));
-#if (defined(CONFIG_MMC_SDHCI_SDMA) || CONFIG_IS_ENABLED(MMC_SDHCI_ADMA))
+#if (CONFIG_IS_ENABLED(MMC_SDHCI_SDMA) || CONFIG_IS_ENABLED(MMC_SDHCI_ADMA))
dma_unmap_single(host->start_addr, data->blocks * data->blocksize,
mmc_get_dma_dir(data));
#endif
@@ -836,7 +836,7 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
#endif
debug("%s, caps: 0x%x\n", __func__, caps);
-#ifdef CONFIG_MMC_SDHCI_SDMA
+#if CONFIG_IS_ENABLED(MMC_SDHCI_SDMA)
if ((caps & SDHCI_CAN_DO_SDMA)) {
host->flags |= USE_SDMA;
} else {
From 0885f6b57b218f0de18cd67856fcfdd68843fc9a Mon Sep 17 00:00:00 2001
From: Samuel Dionne-Riel <samuel@dionne-riel.com>
Date: Sun, 30 Jan 2022 21:44:07 -0500
Subject: [PATCH 7/7] [WIP] pinephone-pro: Remove cargo-culted iodomain config
It is unclear what it actually does, and the TRM states this register
should already be at `0x1` on reset.
Thus it is assumed this would be redundant. Except that it is not, and
keeping this change in will break SPI NOR Flash support. The SPI bus(?)
will be tied up, I assume, and thus return `ff ff ff` as an identifier
---
board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
index c51d1657a2a..22c2ced2d79 100644
--- a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
+++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
@@ -33,9 +33,6 @@ static void setup_iodomain(void)
/* BT565 is in 1.8v domain */
rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
-
- /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
- rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
}
int misc_init_r(void)
--
2.34.0
From 8945d49c2d60a3b26d215b2d6c45918ac9d143bd Mon Sep 17 00:00:00 2001
From: Samuel Dionne-Riel <samuel@dionne-riel.com>
Date: Sun, 30 Jan 2022 16:59:26 -0500
Subject: [PATCH 6/7] pine64-pinephonePro: SPI support
NOTE: Original patch modified a bit for the used version of the PPP DT.
---
diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
index 9d44db59783..28bec0a6a70 100644
--- a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
@@ -42,3 +42,7 @@
max-frequency = <20000000>;
u-boot,dm-pre-reloc;
};
+
+&spiflash {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3399-pinephone-pro.dts b/arch/arm/dts/rk3399-pinephone-pro.dts
index e6c2df936fb..9a658f37c69 100644
--- a/arch/arm/dts/rk3399-pinephone-pro.dts
+++ b/arch/arm/dts/rk3399-pinephone-pro.dts
@@ -503,6 +503,16 @@
status = "okay";
};
+&spi1 {
+ status = "okay";
+
+ spiflash: flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+ };
+};
+
&vopb {
status = "okay";
};
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