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Commit a9708285 authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'v5.1-rockchip-dtfixes-1' of... 

Merge tag 'v5.1-rockchip-dtfixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes

Fixes for dtc warnings, fixes for ethernet transfers on rk3328,
sd-card related fixes on both rk3328 ans rk3288-tinker and a
regulator fix on rock64 and making ddc actually work on the
Rock PI 4 due to missing the ddc bus.

* tag 'v5.1-rockchip-dtfixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  ARM: dts: rockchip: Remove #address/#size-cells from rk3288-veyron gpio-keys
  ARM: dts: rockchip: Remove #address/#size-cells from rk3288 mipi_dsi
  ARM: dts: rockchip: Fix gpu opp node names for rk3288
  arm64: dts: rockchip: fix rk3328 sdmmc0 write errors
  arm64: dts: rockchip: fix rk3328 rgmii high tx error rate
  ARM: dts: rockchip: Fix SD card detection on rk3288-tinker
  arm64: dts: rockchip: Fix vcc_host1_5v GPIO polarity on rk3328-rock64
  ARM: dts: rockchip: fix rk3288 cpu opp node reference
  arm64: dts: rockchip: add DDC bus on Rock Pi 4
  arm64: dts: rockchip: fix rk3328-roc-cc gmac2io tx/rx_delay

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 3e372088 1a966651
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with 44 additions and 47 deletions
arch/arm/boot/dts/rk3288-tinker.dtsi
+ 2
− 1
View file @ a9708285
...@@ -254,6 +254,7 @@ regulator-state-mem { ...@@ -254,6 +254,7 @@ regulator-state-mem {
}; };
vccio_sd: LDO_REG5 { vccio_sd: LDO_REG5 {
regulator-boot-on;
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd"; regulator-name = "vccio_sd";
...@@ -430,7 +431,7 @@ &sdmmc { ...@@ -430,7 +431,7 @@ &sdmmc {
bus-width = <4>; bus-width = <4>;
cap-mmc-highspeed; cap-mmc-highspeed;
cap-sd-highspeed; cap-sd-highspeed;
card-detect-delay = <200>; broken-cd;
disable-wp; /* wp not hooked up */ disable-wp; /* wp not hooked up */
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
......
arch/arm/boot/dts/rk3288-veyron.dtsi
+ 0
− 2
View file @ a9708285
...@@ -25,8 +25,6 @@ memory { ...@@ -25,8 +25,6 @@ memory {
gpio_keys: gpio-keys { gpio_keys: gpio-keys {
compatible = "gpio-keys"; compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pwr_key_l>; pinctrl-0 = <&pwr_key_l>;
......
arch/arm/boot/dts/rk3288.dtsi
+ 9
− 11
View file @ a9708285
...@@ -70,7 +70,7 @@ cpu1: cpu@501 { ...@@ -70,7 +70,7 @@ cpu1: cpu@501 {
compatible = "arm,cortex-a12"; compatible = "arm,cortex-a12";
reg = <0x501>; reg = <0x501>;
resets = <&cru SRST_CORE1>; resets = <&cru SRST_CORE1>;
operating-points = <&cpu_opp_table>; operating-points-v2 = <&cpu_opp_table>;
#cooling-cells = <2>; /* min followed by max */ #cooling-cells = <2>; /* min followed by max */
clock-latency = <40000>; clock-latency = <40000>;
clocks = <&cru ARMCLK>; clocks = <&cru ARMCLK>;
...@@ -80,7 +80,7 @@ cpu2: cpu@502 { ...@@ -80,7 +80,7 @@ cpu2: cpu@502 {
compatible = "arm,cortex-a12"; compatible = "arm,cortex-a12";
reg = <0x502>; reg = <0x502>;
resets = <&cru SRST_CORE2>; resets = <&cru SRST_CORE2>;
operating-points = <&cpu_opp_table>; operating-points-v2 = <&cpu_opp_table>;
#cooling-cells = <2>; /* min followed by max */ #cooling-cells = <2>; /* min followed by max */
clock-latency = <40000>; clock-latency = <40000>;
clocks = <&cru ARMCLK>; clocks = <&cru ARMCLK>;
...@@ -90,7 +90,7 @@ cpu3: cpu@503 { ...@@ -90,7 +90,7 @@ cpu3: cpu@503 {
compatible = "arm,cortex-a12"; compatible = "arm,cortex-a12";
reg = <0x503>; reg = <0x503>;
resets = <&cru SRST_CORE3>; resets = <&cru SRST_CORE3>;
operating-points = <&cpu_opp_table>; operating-points-v2 = <&cpu_opp_table>;
#cooling-cells = <2>; /* min followed by max */ #cooling-cells = <2>; /* min followed by max */
clock-latency = <40000>; clock-latency = <40000>;
clocks = <&cru ARMCLK>; clocks = <&cru ARMCLK>;
...@@ -1119,8 +1119,6 @@ mipi_dsi: mipi@ff960000 { ...@@ -1119,8 +1119,6 @@ mipi_dsi: mipi@ff960000 {
clock-names = "ref", "pclk"; clock-names = "ref", "pclk";
power-domains = <&power RK3288_PD_VIO>; power-domains = <&power RK3288_PD_VIO>;
rockchip,grf = <&grf>; rockchip,grf = <&grf>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled"; status = "disabled";
ports { ports {
...@@ -1282,27 +1280,27 @@ gpu: gpu@ffa30000 { ...@@ -1282,27 +1280,27 @@ gpu: gpu@ffa30000 {
gpu_opp_table: gpu-opp-table { gpu_opp_table: gpu-opp-table {
compatible = "operating-points-v2"; compatible = "operating-points-v2";
opp@100000000 { opp-100000000 {
opp-hz = /bits/ 64 <100000000>; opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <950000>; opp-microvolt = <950000>;
}; };
opp@200000000 { opp-200000000 {
opp-hz = /bits/ 64 <200000000>; opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <950000>; opp-microvolt = <950000>;
}; };
opp@300000000 { opp-300000000 {
opp-hz = /bits/ 64 <300000000>; opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <1000000>; opp-microvolt = <1000000>;
}; };
opp@400000000 { opp-400000000 {
opp-hz = /bits/ 64 <400000000>; opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <1100000>; opp-microvolt = <1100000>;
}; };
opp@500000000 { opp-500000000 {
opp-hz = /bits/ 64 <500000000>; opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <1200000>; opp-microvolt = <1200000>;
}; };
opp@600000000 { opp-600000000 {
opp-hz = /bits/ 64 <600000000>; opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1250000>; opp-microvolt = <1250000>;
}; };
......
arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
+ 2
− 2
View file @ a9708285
...@@ -108,8 +108,8 @@ &gmac2io { ...@@ -108,8 +108,8 @@ &gmac2io {
snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
snps,reset-active-low; snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>; snps,reset-delays-us = <0 10000 50000>;
tx_delay = <0x25>; tx_delay = <0x24>;
rx_delay = <0x11>; rx_delay = <0x18>;
status = "okay"; status = "okay";
}; };
......
arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
+ 1
− 2
View file @ a9708285
...@@ -46,8 +46,7 @@ vcc_host_5v: vcc-host-5v-regulator { ...@@ -46,8 +46,7 @@ vcc_host_5v: vcc-host-5v-regulator {
vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
enable-active-high; gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&usb20_host_drv>; pinctrl-0 = <&usb20_host_drv>;
regulator-name = "vcc_host1_5v"; regulator-name = "vcc_host1_5v";
......
arch/arm64/boot/dts/rockchip/rk3328.dtsi
+ 29
− 29
View file @ a9708285
...@@ -1445,11 +1445,11 @@ sdmmc0m1_gpio: sdmmc0m1-gpio { ...@@ -1445,11 +1445,11 @@ sdmmc0m1_gpio: sdmmc0m1-gpio {
sdmmc0 { sdmmc0 {
sdmmc0_clk: sdmmc0-clk { sdmmc0_clk: sdmmc0-clk {
rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_4ma>; rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_8ma>;
}; };
sdmmc0_cmd: sdmmc0-cmd { sdmmc0_cmd: sdmmc0-cmd {
rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_4ma>; rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_8ma>;
}; };
sdmmc0_dectn: sdmmc0-dectn { sdmmc0_dectn: sdmmc0-dectn {
...@@ -1461,14 +1461,14 @@ sdmmc0_wrprt: sdmmc0-wrprt { ...@@ -1461,14 +1461,14 @@ sdmmc0_wrprt: sdmmc0-wrprt {
}; };
sdmmc0_bus1: sdmmc0-bus1 { sdmmc0_bus1: sdmmc0-bus1 {
rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_4ma>; rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>;
}; };
sdmmc0_bus4: sdmmc0-bus4 { sdmmc0_bus4: sdmmc0-bus4 {
rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_4ma>, rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>,
<1 RK_PA1 1 &pcfg_pull_up_4ma>, <1 RK_PA1 1 &pcfg_pull_up_8ma>,
<1 RK_PA2 1 &pcfg_pull_up_4ma>, <1 RK_PA2 1 &pcfg_pull_up_8ma>,
<1 RK_PA3 1 &pcfg_pull_up_4ma>; <1 RK_PA3 1 &pcfg_pull_up_8ma>;
}; };
sdmmc0_gpio: sdmmc0-gpio { sdmmc0_gpio: sdmmc0-gpio {
...@@ -1642,50 +1642,50 @@ gmac-1 { ...@@ -1642,50 +1642,50 @@ gmac-1 {
rgmiim1_pins: rgmiim1-pins { rgmiim1_pins: rgmiim1-pins {
rockchip,pins = rockchip,pins =
/* mac_txclk */ /* mac_txclk */
<1 RK_PB4 2 &pcfg_pull_none_12ma>, <1 RK_PB4 2 &pcfg_pull_none_8ma>,
/* mac_rxclk */ /* mac_rxclk */
<1 RK_PB5 2 &pcfg_pull_none_2ma>, <1 RK_PB5 2 &pcfg_pull_none_4ma>,
/* mac_mdio */ /* mac_mdio */
<1 RK_PC3 2 &pcfg_pull_none_2ma>, <1 RK_PC3 2 &pcfg_pull_none_4ma>,
/* mac_txen */ /* mac_txen */
<1 RK_PD1 2 &pcfg_pull_none_12ma>, <1 RK_PD1 2 &pcfg_pull_none_8ma>,
/* mac_clk */ /* mac_clk */
<1 RK_PC5 2 &pcfg_pull_none_2ma>, <1 RK_PC5 2 &pcfg_pull_none_4ma>,
/* mac_rxdv */ /* mac_rxdv */
<1 RK_PC6 2 &pcfg_pull_none_2ma>, <1 RK_PC6 2 &pcfg_pull_none_4ma>,
/* mac_mdc */ /* mac_mdc */
<1 RK_PC7 2 &pcfg_pull_none_2ma>, <1 RK_PC7 2 &pcfg_pull_none_4ma>,
/* mac_rxd1 */ /* mac_rxd1 */
<1 RK_PB2 2 &pcfg_pull_none_2ma>, <1 RK_PB2 2 &pcfg_pull_none_4ma>,
/* mac_rxd0 */ /* mac_rxd0 */
<1 RK_PB3 2 &pcfg_pull_none_2ma>, <1 RK_PB3 2 &pcfg_pull_none_4ma>,
/* mac_txd1 */ /* mac_txd1 */
<1 RK_PB0 2 &pcfg_pull_none_12ma>, <1 RK_PB0 2 &pcfg_pull_none_8ma>,
/* mac_txd0 */ /* mac_txd0 */
<1 RK_PB1 2 &pcfg_pull_none_12ma>, <1 RK_PB1 2 &pcfg_pull_none_8ma>,
/* mac_rxd3 */ /* mac_rxd3 */
<1 RK_PB6 2 &pcfg_pull_none_2ma>, <1 RK_PB6 2 &pcfg_pull_none_4ma>,
/* mac_rxd2 */ /* mac_rxd2 */
<1 RK_PB7 2 &pcfg_pull_none_2ma>, <1 RK_PB7 2 &pcfg_pull_none_4ma>,
/* mac_txd3 */ /* mac_txd3 */
<1 RK_PC0 2 &pcfg_pull_none_12ma>, <1 RK_PC0 2 &pcfg_pull_none_8ma>,
/* mac_txd2 */ /* mac_txd2 */
<1 RK_PC1 2 &pcfg_pull_none_12ma>, <1 RK_PC1 2 &pcfg_pull_none_8ma>,
/* mac_txclk */ /* mac_txclk */
<0 RK_PB0 1 &pcfg_pull_none>, <0 RK_PB0 1 &pcfg_pull_none_8ma>,
/* mac_txen */ /* mac_txen */
<0 RK_PB4 1 &pcfg_pull_none>, <0 RK_PB4 1 &pcfg_pull_none_8ma>,
/* mac_clk */ /* mac_clk */
<0 RK_PD0 1 &pcfg_pull_none>, <0 RK_PD0 1 &pcfg_pull_none_4ma>,
/* mac_txd1 */ /* mac_txd1 */
<0 RK_PC0 1 &pcfg_pull_none>, <0 RK_PC0 1 &pcfg_pull_none_8ma>,
/* mac_txd0 */ /* mac_txd0 */
<0 RK_PC1 1 &pcfg_pull_none>, <0 RK_PC1 1 &pcfg_pull_none_8ma>,
/* mac_txd3 */ /* mac_txd3 */
<0 RK_PC7 1 &pcfg_pull_none>, <0 RK_PC7 1 &pcfg_pull_none_8ma>,
/* mac_txd2 */ /* mac_txd2 */
<0 RK_PC6 1 &pcfg_pull_none>; <0 RK_PC6 1 &pcfg_pull_none_8ma>;
}; };
rmiim1_pins: rmiim1-pins { rmiim1_pins: rmiim1-pins {
......
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
+ 1
− 0
View file @ a9708285
...@@ -158,6 +158,7 @@ &gmac { ...@@ -158,6 +158,7 @@ &gmac {
}; };
&hdmi { &hdmi {
ddc-i2c-bus = <&i2c3>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&hdmi_cec>; pinctrl-0 = <&hdmi_cec>;
status = "okay"; status = "okay";
......
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