arm64: Cache maintenance routines
The patch adds functionality required for cache maintenance. The AArch64 architecture mandates non-aliasing VIPT or PIPT D-cache and VIPT (may have aliases) or ASID-tagged VIVT I-cache. Cache maintenance operations are automatically broadcast in hardware between CPUs. Signed-off-by:Will Deacon <will.deacon@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com> Acked-by:
Tony Lindgren <tony@atomide.com> Acked-by:
Nicolas Pitre <nico@linaro.org> Acked-by:
Olof Johansson <olof@lixom.net> Acked-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by:
Arnd Bergmann <arnd@arndb.de>
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- arch/arm64/include/asm/cache.h 32 additions, 0 deletionsarch/arm64/include/asm/cache.h
- arch/arm64/include/asm/cacheflush.h 148 additions, 0 deletionsarch/arm64/include/asm/cacheflush.h
- arch/arm64/include/asm/cachetype.h 48 additions, 0 deletionsarch/arm64/include/asm/cachetype.h
- arch/arm64/mm/cache.S 168 additions, 0 deletionsarch/arm64/mm/cache.S
- arch/arm64/mm/flush.c 135 additions, 0 deletionsarch/arm64/mm/flush.c
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