- Apr 26, 2013
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Bharat Bhushan authored
Kernel can only access pages which maps as memory. So flush only the valid kernel pages. Signed-off-by:
Bharat Bhushan <bharat.bhushan@freescale.com> Signed-off-by:
Alexander Graf <agraf@suse.de>
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- Apr 25, 2013
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Gleb Natapov authored
Source operand for one byte mov[zs]x is decoded incorrectly if it is in high byte register. Fix that. Cc: stable@vger.kernel.org Signed-off-by:Gleb Natapov <gleb@redhat.com>
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- Apr 22, 2013
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Jan Kiszka authored
If we load the complete EFER MSR on entry or exit, EFER.LMA (and LME) loading is skipped. Their consistency is already checked now before starting the transition. Signed-off-by:
Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
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Jan Kiszka authored
As we may emulate the loading of EFER on VM-entry and VM-exit, implement the checks that VMX performs on the guest and host values on vmlaunch/ vmresume. Factor out kvm_valid_efer for this purpose which checks for set reserved bits. Signed-off-by:
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Jan Kiszka authored
The logic for checking if interrupts can be injected has to be applied also on NMIs. The difference is that if NMI interception is on these events are consumed and blocked by the VM exit. Signed-off-by:
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Jan Kiszka authored
vmx_set_nmi_mask will soon be used by vmx_nmi_allowed. No functional changes. Signed-off-by:
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Andrew Honig authored
If userspace creates and destroys multiple VMs within the same process we leak 20k of memory in the userspace process context per VM. This patch frees the memory in kvm_arch_destroy_vm. If the process exits without closing the VM file descriptor or the file descriptor has been shared with another process then we don't free the memory. It's still possible for a user space process to leak memory if the last process to close the fd for the VM is not the process that created it. However, this is an unexpected case that's only caused by a user space process that's misbehaving. Signed-off-by:
Andrew Honig <ahonig@google.com> Signed-off-by:
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Wei Yongjun authored
Fix to return a negative error code from the error handling case instead of 0, as returned elsewhere in this function. Signed-off-by:
Wei Yongjun <yongjun_wei@trendmicro.com.cn> Reviewed-by:
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Abel Gordon authored
Once L1 loads VMCS12 we enable shadow-vmcs capability and copy all the VMCS12 shadowed fields to the shadow vmcs. When we release the VMCS12, we also disable shadow-vmcs capability. Signed-off-by:
Abel Gordon <abelg@il.ibm.com> Reviewed-by:
Orit Wasserman <owasserm@redhat.com> Signed-off-by:
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Abel Gordon authored
Synchronize between the VMCS12 software controlled structure and the processor-specific shadow vmcs Signed-off-by:
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Abel Gordon authored
Introduce a function used to copy fields from the software controlled VMCS12 to the processor-specific shadow vmcs Signed-off-by:
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Abel Gordon authored
Introduce a function used to copy fields from the processor-specific shadow vmcs to the software controlled VMCS12 Signed-off-by:
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Abel Gordon authored
Unmap vmcs12 and release the corresponding shadow vmcs Signed-off-by:
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Abel Gordon authored
Allocate a shadow vmcs used by the processor to shadow part of the fields stored in the software defined VMCS12 (let L1 access fields without causing exits). Note we keep a shadow vmcs only for the current vmcs12. Once a vmcs12 becomes non-current, its shadow vmcs is released. Signed-off-by:
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Abel Gordon authored
handle_vmon doesn't check if L1 is already in root mode (VMXON was previously called). This patch adds this missing check and calls nested_vmx_failValid if VMX is already ON. We need this check because L0 will allocate the shadow vmcs when L1 executes VMXON and we want to avoid host leaks (due to shadow vmcs allocation) if L1 executes VMXON repeatedly. Signed-off-by:
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Abel Gordon authored
Refactor existent code so we re-use vmcs12_write_any to copy fields from the shadow vmcs specified by the link pointer (used by the processor, implementation-specific) to the VMCS12 software format used by L0 to hold the fields in L1 memory address space. Signed-off-by:
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Abel Gordon authored
Prepare vmread and vmwrite bitmaps according to a pre-specified list of fields. These lists are intended to specifiy most frequent accessed fields so we can minimize the number of fields that are copied from/to the software controlled VMCS12 format to/from to processor-specific shadow vmcs. The lists were built measuring the VMCS fields access rate after L2 Ubuntu 12.04 booted when it was running on top of L1 KVM, also Ubuntu 12.04. Note that during boot there were additional fields which were frequently modified but they were not added to these lists because after boot these fields were not longer accessed by L1. Signed-off-by:
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Abel Gordon authored
Add logic required to detect if shadow-vmcs is supported by the processor. Introduce a new kernel module parameter to specify if L0 should use shadow vmcs (or not) to run L1. Signed-off-by:
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Abel Gordon authored
Add definitions for all the vmcs control fields/bits required to enable vmcs-shadowing Signed-off-by:
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- Apr 18, 2013
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Yang Zhang authored
Fix the compile error with kvm_vm_ioctl_irq_line. Signed-off-by:
Yang Zhang <yang.z.zhang@Intel.com> Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com>
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Zhang, Yang Z authored
->send_IPI_mask is not defined on UP. Signed-off-by:
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- Apr 17, 2013
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Scott Wood authored
complete_mmio_load writes back the mmio result into the destination register. Doing this on a store results in register corruption. Signed-off-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
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Stuart Yoder authored
Signed-off-by:
Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by:
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Bharat Bhushan authored
This patch adds the one_reg interface to get the special instruction to be used for setting software breakpoint from userspace. Signed-off-by:
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Alexander Graf authored
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- Apr 16, 2013
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Gleb Natapov authored
If guest vcpu is in VM86 mode the vcpu state should be checked as if in real mode. Signed-off-by:
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Paolo Bonzini authored
KVM does not use the activity state VMCS field, and does not support it in nested VMX either (the corresponding bits in the misc VMX feature MSR are zero). Fail entry if the activity state is set to anything but "active". Since the value will always be the same for L1 and L2, we do not need to read and write the corresponding VMCS field on L1/L2 transitions, either. Signed-off-by:
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Alexander Graf authored
Commit aa2fbe6d broke the ARM KVM target by introducing a new parameter to irq handling functions. Fix the function prototype to get things compiling again and ignore the parameter just like we did before Signed-off-by:
Christoffer Dall <cdall@cs.columbia.edu> Signed-off-by:
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Yang Zhang authored
If posted interrupt is avaliable, then uses it to inject virtual interrupt to guest. Signed-off-by:
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Yang Zhang authored
Only deliver the posted interrupt when target vcpu is running and there is no previous interrupt pending in pir. Signed-off-by:
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Yang Zhang authored
We already know the trigger mode of a given interrupt when programming the ioapice entry. So it's not necessary to set it in each interrupt delivery. Signed-off-by:
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Yang Zhang authored
Both TMR and EOI exit bitmap need to be updated when ioapic changed or vcpu's id/ldr/dfr changed. So use common function instead eoi exit bitmap specific function. Signed-off-by:
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Yang Zhang authored
Detect the posted interrupt feature. If it exists, then set it in vmcs_config. Signed-off-by:
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Yang Zhang authored
Posted Interrupt feature requires a special IPI to deliver posted interrupt to guest. And it should has a high priority so the interrupt will not be blocked by others. Normally, the posted interrupt will be consumed by vcpu if target vcpu is running and transparent to OS. But in some cases, the interrupt will arrive when target vcpu is scheduled out. And host will see it. So we need to register a dump handler to handle it. Signed-off-by:
Ingo Molnar <mingo@kernel.org> Reviewed-by:
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Yang Zhang authored
The "acknowledge interrupt on exit" feature controls processor behavior for external interrupt acknowledgement. When this control is set, the processor acknowledges the interrupt controller to acquire the interrupt vector on VM exit. After enabling this feature, an interrupt which arrived when target cpu is running in vmx non-root mode will be handled by vmx handler instead of handler in idt. Currently, vmx handler only fakes an interrupt stack and jump to idt table to let real handler to handle it. Further, we will recognize the interrupt and only delivery the interrupt which not belong to current vcpu through idt table. The interrupt which belonged to current vcpu will be handled inside vmx handler. This will reduce the interrupt handle cost of KVM. Also, interrupt enable logic is changed if this feature is turnning on: Before this patch, hypervior call local_irq_enable() to enable it directly. Now IF bit is set on interrupt stack frame, and will be enabled on a return from interrupt handler if exterrupt interrupt exists. If no external interrupt, still call local_irq_enable() to enable it. Refer to Intel SDM volum 3, chapter 33.2. Signed-off-by:
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Yang Zhang authored
Current interrupt coalescing logci which only used by RTC has conflict with Posted Interrupt. This patch introduces a new mechinism to use eoi to track interrupt: When delivering an interrupt to vcpu, the pending_eoi set to number of vcpu that received the interrupt. And decrease it when each vcpu writing eoi. No subsequent RTC interrupt can deliver to vcpu until all vcpus write eoi. Signed-off-by:
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Yang Zhang authored
Userspace may deliver RTC interrupt without query the status. So we want to track RTC EOI for this case. Signed-off-by:
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Yang Zhang authored
Need the EOI to track interrupt deliver status, so force vmexit on EOI for rtc interrupt when enabling virtual interrupt delivery. Signed-off-by:
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Yang Zhang authored
restore rtc_status from migration or save/restore Signed-off-by:
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